|
ITEM
|
Value
|
Remarks
|
|
Output Logic Type
|
CMOS
|
CMOS XO
|
|
Frequency Range
|
50.000 MHz
|
|
|
Supply Voltage(VDD)
|
3.3 VDC ± 10 %, 5.0 VDC ± 10 %
|
|
|
Operating Temperature Range
|
0 to +70 ℃, -20 to +70 ℃, -40 to +85 ℃
|
|
|
Storage Temperature Range
|
-55 to +125 ℃
|
|
|
Frequency Stability
|
±20 ppm, ±25 ppm, ±50 ppm, ±100 ppm Max.
|
Over operating temperature
range
|
|
Input Current
|
17 mA(3.3 V), 25(5.0 V) Max.
25 mA(3.3 V), 40(5.0 V) Max.
35 mA(3.3 V), 60(5.0 V) Max.
45 mA(3.3 V), 70(5.0 V) Max.
65 mA(3 3 V), 80(5 0 V) Max
|
1.000 to 20.000MHz
20.001 to 40.000MHz
40.001 to 80.000MHz
80.001 to 125.000MHz
125.000 to 200 000MHz
|
|
Output Voltage Logic High(VOH)
|
90 % of VDD Min.
|
|
|
Output Voltage Logic Low(VOL)
|
10 % of VDD Max.
|
|
|
Rise / Fall Time
|
10 ns Max.(1.000 to 20.000MHz)
6 ns Max.(20.001 to 70.000MHz)
4 ns Max.(70.0001 to 125.000MHz)
2 ns Max (125 000 to 200 000MHz)
|
Measured over
10 % to 90 % of waveform
|
|
Duty Cycle
|
45 to 55 %, 40 to 60 %
|
Measured at 50 % of waveform
|
|
Start-up Time
|
10 ms Max.
|
|
|
Output Load Condition(CMOS)
|
15 pF Max.
|
|
Output Enable Function
(VIH and VIL)
|
70 % of VDD min. to Enable Output
30 % of VDD max. to Enable Output
|
High Impedance
|
|
RMS Phase Jitter
|
1 ps Max.
|
BW : 12 kHz to 20 MHz
|
|
Frequency Aging
|
±5 ppm Max.
|
25℃, First year
|
CEOB2B
CEOB2B
